Title :
Digital circuit design through simulated evolution (SimE)
Author :
Sait, Sadiq M. ; Abd-El-Barr, Mostafa ; Al-Saiari, U.S. ; Sarif, Bambang A B
Author_Institution :
Dept. of Comput. Eng., King Fahd Univ. of Pet. & Minerals, Dhahran, Saudi Arabia
Abstract :
In this paper, the use of simulated evolution (SimE) algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection and allocation. Two goodness measures are designed to guide the selection and allocation operations of SimE. Area, power and delay are considered in the optimization of circuits. Results obtained by SimE algorithm are compared to those obtained by genetic algorithm (GA).
Keywords :
circuit optimisation; circuit simulation; genetic algorithms; logic design; allocation operations; circuits optimization; digital circuit design; digital logic circuits; evaluation operation; genetic algorithm; selection operation; simulated evolution; Circuit simulation; Circuit synthesis; Computational modeling; Cost function; Delay; Digital circuits; Humans; Logic circuits; Logic design; Process design;
Conference_Titel :
Evolutionary Computation, 2003. CEC '03. The 2003 Congress on
Print_ISBN :
0-7803-7804-0
DOI :
10.1109/CEC.2003.1299600
