Effect of the membrane flatness defect on the offset voltage of a silicon piezoresistive pressure sensor

In this paper, we study the effect of the membrane sides parallelism defect on the offset voltage of a silicon piezoresistive pressure sensor. The study is based on an experimental profile plot of the membrane bottom of 30 μm thickness realised in LAAS. By assuming dimensionless gauges implanted on the membrane, the value of the offset voltage was quantified as a function of average thickness of the membrane. In spite of the low values of the parallelism defect (typically about 1% of the membrane thickness), it is shown that there is an offset voltage which is relatively high and perfectly quantified.