A novel frequency compensation technique for two-stage CMOS operational amplifiers

Author

Taherzadeh-Sani, M. ; Lofti, R. ; Hoaei, O.S.

Author_Institution

Fac. of Eng., Tehran Univ., Iran

Volume

1

fYear

2003

fDate

14-17 Dec. 2003

Firstpage

256

Abstract

In this paper, a novel compensation technique for two-stage CMOS operational amplifiers (op-amps) is presented. This method employs a smaller total capacitance compared to that of the traditional-compensation approaches with similar frequency response. As this capacitor is not placed in the path of the signal, the large signal settling behavior and so the total settling time of the op-amp is improved. HSPICE simulations reveal that the proposed approach, compared to cascode-compensated counterpart, would reduce the total compensation capacitor and the settling time as high as 36% and 10%, respectively.

Keywords

CMOS analogue integrated circuits; SPICE; compensation; feedback amplifiers; frequency response; low-power electronics; operational amplifiers; step response; HSPICE simulations; cascode compensation; charge redistribution sample and hold; frequency compensation technique; frequency response; large signal settling behavior; low-voltage CMOS analog circuits; step response; tachometer feedback control; total compensation capacitor; total settling time; two-pole system; two-stage CMOS operational amplifiers; CMOS integrated circuits; CMOS technology; Capacitance; Capacitors; Design engineering; Feedback control; Frequency; Operational amplifiers; Output feedback; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on

Print_ISBN

0-7803-8163-7

Type

conf

DOI

10.1109/ICECS.2003.1302025

Filename

1302025