Adaptive processor: a model of stream processing

Summary form only given. Recently, configuration of an application specific pipelined datapath is proposed, especially for supporting stream processing. Adaptive processor model and its architecture were proposed, however, discussion is still necessary to be clear problem and advance. Parallel I/O is key of array processing, however, there is no register file for basic adaptive processor model. There are sequencers with memory block replacing the register file. We show first evaluation results based on static analysis for area and execution time assessments, and on simple simulator for observing behavior of the adaptive processor.