Title :
Characterization & modeling of low electric field gate-induced-drain-leakage [MOSFET]
Author :
Rideau, D. ; Dray, A. ; Gilibert, F. ; Agut, F. ; Giguerre, L. ; Gouget, G. ; Minondo, M. ; Juge, A.
Author_Institution :
Central R&D, STMicroelectronics, Crolles, France
Abstract :
We present measurements of GIDL at various temperatures and terminal biases. Besides band-to-band (BBT) tunneling leakage observed at high drain-to-gate voltage VDG, we also observed trap-assisted-tunneling (TAT) leakage currents at lower VDG. Based on ISE TCAD simulations of the electric field, we propose analytical models for BBT and TAT GIDL currents suitable for compact modelling.
Keywords :
MOSFET; leakage currents; semiconductor device measurement; semiconductor device models; technology CAD (electronics); tunnelling; BBT; GIDL characterization; GIDL modeling; MOSFET; TAT; band-to-band tunneling leakage; compact modelling; drain-to-gate voltage; electric field TCAD simulations; gate-induced-drain-leakage; junction leakage current; low electric field GIDL; terminal bias; trap-assisted-tunneling; Current measurement; Fluid flow measurement; Leakage current; MOSFETs; Microelectronics; Research and development; Temperature dependence; Testing; Thickness measurement; Voltage;
Conference_Titel :
Microelectronic Test Structures, 2004. Proceedings. ICMTS '04. The International Conference on
Print_ISBN :
0-7803-8262-5
DOI :
10.1109/ICMTS.2004.1309469
