Title :
Design of rate-compatible punctured serial concatenated convolutional codes
Author :
Babich, Fulvio ; Montorsi, Guido ; Vatta, Francesca
Author_Institution :
Dipt. di Elettrotecnica Elettronica ed Inf., Trieste Univ., Italy
Abstract :
A new design criterion to obtain well performing rate-compatible serial concatenated convolutional codes (SCCC) families is proposed. To obtain rate-compatible SCCCs, the puncturing is limited to inner coded bits. However, the puncturing is not restricted to inner parity bits, but extended also to inner systematic bits, thus obtaining high rate SCCCs (i.e., beyond the outer code rate). The considerations presented in S. Benedetto, et al., (1998) to find "best" component encoders for SCCCs construction are extended to find the "best" rate-compatible puncturing patterns for a given input decoding delay I. A rate-compatibility restriction to the puncturing rule is used, implying that all the code bits of a high-rate punctured code are used by the lower rate codes. The two main applications of this technique are its use in hybrid ARQ/FEC schemes and to achieve unequal error protection (UEP) of an information sequence.
Keywords :
automatic repeat request; concatenated codes; convolutional codes; delays; forward error correction; iterative decoding; parity check codes; SCCC construction; UEP; automatic repeat request; decoding delay; encoder; forward error correction; hybrid ARQ-FEC scheme; information sequence; inner coded bit; parity bit; rate-compatible puncturing code; serial concatenated convolutional code; systematic bit; unequal error protection; Automatic repeat request; Concatenated codes; Convolutional codes; Decoding; Delay; Design optimization; Error correction codes; Floors; Forward error correction; Proposals;
Conference_Titel :
Communications, 2004 IEEE International Conference on
Print_ISBN :
0-7803-8533-0
DOI :
10.1109/ICC.2004.1312550