Thermal phenomena in nanoscale transistors

As transistor gate lengths are scaled to 50 nm and below thermal device design is becoming an important part of microprocessor engineering. Decreasing dimensions lead to nanometer-scale hot spots in the transistor drain region, which may increase the drain series and source injection electrical resistances. Such trends are accelerated with the introduction of novel materials and non-traditional transistor geometries, like ultra-thin body, FinFET, or nanowire devices, which impede heat conduction. Thermal analysis is complicated by sub-continuum phenomena including ballistic electron transport, which displaces and reshapes the hot spot region compared with classical diffusion theory predictions. Ballistic phonon transport from the hot spot and between material boundaries impedes conduction cooling. The increased surface to volume ratio of novel transistor designs also leads to a larger contribution from material boundary thermal resistance. This paper surveys trends in transistor geometries and materials, along with their implications for the thermal design of electronic systems.