DocumentCode
415937
Title
System-on-a-package (SOP) substrate and module with digital, RF and optical integration
Author
Sundaram, Venky ; Tummala, Rao ; White, George ; Lim, Kyutae ; Wan, Lixi ; Guidotti, Daniel ; Liu, Fuhan ; Bhattacharya, Surya ; Pulugurtha, Raj M. ; Abothu, Isaac Robin ; Doraiswami, Ravi ; Pucha, Raghuram V. ; Laskar, Joy ; Tentzeris, Manos ; Chang, G.K
Author_Institution
Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
Volume
1
fYear
2004
fDate
1-4 June 2004
Firstpage
17
Abstract
The Packaging Research Center has been developing next generation system-on-a-package (SOP) technology with digital, RF, and optical system integration on a single package. SOP aims to utilize the best of on-chip SOC integration and package integration to achieve the highest system performance at the lowest cost. The micro-miniaturized multi-functional SOP package is highly integrated and fabricated on large area substrates similar to the wafer-to-IC concept. In addition to novel mixed signal design methodologies, SOP research at PRC is targeted at developing enabling technologies for package level integration including ultra-high density wiring, embedded passive components, embedded optical interconnects, wafer level packaging and fine pitch assembly. Several of these enabling technologies have been recently integrated into the first successful system level demonstration of SOP technology using the intelligent network communicator (INC) testbed. This paper reports on the latest INC and SOP testbed results at the PRC and provides an insight into the future SOP integration strategy for convergent microsystems. The focus of this paper is on integration of materials, processes and structures in a single package substrate for system-on-a-package (SOP) implementation.
Keywords
chip scale packaging; digital integrated circuits; fine-pitch technology; integrated circuit design; integrated circuit interconnections; optical interconnections; radiofrequency integrated circuits; substrates; system-on-chip; wafer-scale integration; RF integration; SOP; convergent microsystems; digital integration; embedded optical interconnects; embedded passive components; fine pitch assembly; intelligent network communicator testbed; large area substrates; materials integration; micro-miniaturized multi-functional SOP package; mixed signal design methodologies; optical integration; package level integration; single package; single package substrate structures; system-on-a-package substrate; ultra-high density wiring; wafer level packaging; Costs; Integrated optics; Packaging; Partial response channels; Radio frequency; Signal design; System performance; System-on-a-chip; Wafer scale integration; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2004. Proceedings. 54th
Print_ISBN
0-7803-8365-6
Type
conf
DOI
10.1109/ECTC.2004.1319309
Filename
1319309
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