• DocumentCode
    415987
  • Title

    Modeling thermo-mechanical reliability of bumpless flip chip package

  • Author

    Che, F.X. ; Low, T.H. ; Pang, John H L ; Lin, Charles W C ; Chiang, Sam C L ; Yang, T. K Andrew

  • Author_Institution
    Sch. of Mech. & Production Eng., Nanyang Technol. Univ., Singapore
  • Volume
    1
  • fYear
    2004
  • fDate
    1-4 June 2004
  • Firstpage
    421
  • Abstract
    FEA of the thermo-mechanical reliability of a bumpless flip chip package (BFCP) was investigated. Both package-level and board-level assemblies are modeled using 2D plane strain models. The package-level temperature cycling profile used was -65°C to +150°C, with 2 cycles/hour, upper and lower soak time of 10 minutes. The package survived 2000 cycles without any failures. The board level assembly test is planned and modeling is conducted for a temperature cycling profile of -40°C to +125°C, with 1 cycle/hour, upper and lower soak time of 15 minutes. For the package level analysis, the copper interconnection material properties were modeled using different properties from bulk Cu and electroplated Cu data. The mechanical properties of both the bulk and electroplated copper were used in the FEA simulation and the results compared. A fatigue life prediction study, using the appropriate thin-film properties of Cu and the fatigue properties of thin-film Cu gave reasonable predicted life. For the second level solder joint analysis, the deformation behavior of the compliant terminals with the solder joints were investigated. Visco-elastic properties were used for the epoxy resin, viscoplastic properties were used for the eutectic Sn-Pb solder joints. The elastic energy density method was used for solder joint fatigue life prediction.
  • Keywords
    copper; deformation; fatigue; finite element analysis; flip-chip devices; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; lead alloys; strain ageing; thermal stresses; tin alloys; viscoelasticity; viscoplasticity; -40 to 125 degC; -65 to 150 degC; 10 min; 15 min; 2D plane strain models; BFCP; FEA simulation; SnPb-Cu; board level assembly test; bulk copper; bumpless flip chip package; deformation; elastic energy density method; electroplated copper; eutectic solder joints; fatigue life prediction; finite element modeling; interconnection material properties; joint viscoelastic properties; joint viscoplastic properties; package-level temperature cycling profile; second level solder joint analysis; thermo-mechanical reliability; Assembly; Capacitive sensors; Copper; Fatigue; Flip chip; Packaging; Soldering; Temperature; Thermomechanical processes; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2004. Proceedings. 54th
  • Print_ISBN
    0-7803-8365-6
  • Type

    conf

  • DOI
    10.1109/ECTC.2004.1319374
  • Filename
    1319374