DocumentCode
416257
Title
A fast hardware/software co-verification method for systern-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication
Author
Nakamura, Yuichi ; Hosokawa, Kouhei ; Kuroda, Ichiro ; Yoshikawa, Ko ; Yoshimura, Takeshi
Author_Institution
NEC Corporation
fYear
2004
fDate
7-11 July 2004
Firstpage
299
Lastpage
304
Keywords
Computational modeling; Computer simulation; Debugging; Emulation; Fabrication; Field programmable gate arrays; Hardware; Permission; Registers; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location
San Diego, CA, USA
ISSN
0738-100X
Print_ISBN
1-51183-828-8
Type
conf
Filename
1322493
Link To Document