Title :
A methodology to improve timing yield in the presence of process variations
Author :
Raj, Sreeja ; Vrudhula, Sarma B K ; Wang, Janet
Author_Institution :
ECE Dept., University of Arizona
Keywords :
Circuits; Delay; Design methodology; Fabrication; Low power electronics; Random variables; Size control; Timing; Uncertainty; Yield estimation;
Conference_Titel :
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location :
San Diego, CA, USA
Print_ISBN :
1-51183-828-8