DocumentCode
416324
Title
Design and implementation of the POWER5 microprocessor
Author
Clabes, J. ; Friedrich, J. ; Sweet, M. ; DiLullo, J. ; Chu, S. ; Plass, D. ; Dawson, J. ; Muench, P. ; Powell, L. ; Floyd, M. ; Sinharoy, B. ; Lee, M. ; Goulet, M. ; Wagoner, J. ; Schwartz, N. ; Runyon, S. ; Gorman, G. ; Restle, P. ; Kalla, R. ; McGill, J
Author_Institution
IBM Systems Group, Austin, TX
fYear
2004
fDate
7-11 July 2004
Firstpage
670
Lastpage
672
Abstract
POWERS offers significantly increased performance over previous POWER designs by incorporating simultaneous multithreading, an enhanced memory subsystem, and extensive RAS and power management support. The 276M transistor processor is implemented in 13Onm silicon-on-insulator technology with 8-level of Cu metallization and operates at >1.5 GHz
Keywords
Clocks; Costs; Delay; Fabrics; Integrated circuit interconnections; Microprocessors; Multithreading; Silicon on insulator technology; Surface-mount technology; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location
San Diego, CA, USA
ISSN
0738-100X
Print_ISBN
1-51183-828-8
Type
conf
Filename
1322567
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