DocumentCode :
416329
Title :
Modeling repeaters explicitly within analytical placement
Author :
Saxena, P. ; Halpin, B.
Author_Institution :
Intel Labs (CAD Research), USA
fYear :
2004
fDate :
7-11 July 2004
Firstpage :
699
Lastpage :
704
Abstract :
Recent works have shown that scaling causes the number of repeaters to grow rapidly. We demonstrate that this growth leads to massive placement perturbations that break the convergence of today´s interleaved placement and repeater insertion flows. We then present two new force models for repeaters targeted towards analytical placement algorithms. Our experiments demonstrate the effectiveness of our repeater modeling technique in preserving placement convergence (often also accompanied by wirelength improvement) at the 45 and 32 nm technology nodes.
Keywords :
Algorithm design and analysis; Integrated circuit interconnections; Integrated circuit layout; Integrated circuit technology; Interleaved codes; Permission; Repeaters; Robustness; Routing; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location :
San Diego, CA, USA
ISSN :
0738-100X
Print_ISBN :
1-51183-828-8
Type :
conf
Filename :
1322574
Link To Document :
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