A statistical background calibration technique for flash analog-to-digital converters

A new background calibration technique is described to digitally trim the input-referred offset voltage of comparators in high-speed flash analog-to-digital converters. The polarity of comparator´s offset is detected by observing the output code density of a random chopping comparator. Binary feedback is used to adjust the comparator´s offset. All calibration processing is performed in the digital domain, thus, minimizing the overhead for analog circuitry. Two key design parameters are the comparator´s trimming step and the thresholds of a peak detector, which determine the offset´s standard deviation and the time constant of the calibration loop.