• DocumentCode
    418053
  • Title

    Margin normalization and propagation in analog VLSI

  • Author

    Chakrabartty, Shantanu ; Cauwenberghs, Gert

  • Author_Institution
    Dept. of Electr. & Comput. Eng.,, John Hopkins Univ., Baltimore, MD, USA
  • Volume
    1
  • fYear
    2004
  • fDate
    23-26 May 2004
  • Abstract
    We propose a margin propagation algorithm as an alternate decoding method to usual probability propagation algorithm. The decoding based on margins depends only on basic additions and subtractions and thus can be easily implemented in analog VLSI in a manner that is independent of the device characteristics. We present an analog VLSI implementation of the margin propagation network using CMOS transistors and provide experimental results obtained from a system fabricated in 0.5μ CMOS process. Preliminary results indicate that margin based decoding is robust to input noise and parameter mismatches and can provide superior performance as compared to usual probability propagation.
  • Keywords
    CMOS analogue integrated circuits; VLSI; analogue circuits; decoding; 0.5 micron; CMOS process; CMOS transistors; analog VLSI; decoding method; margin normalization; margin propagation algorithm; parameter mismatches; probability propagation algorithm; Additive noise; CMOS process; Circuit noise; Decoding; Energy consumption; Equations; Integrated circuit interconnections; MOSFETs; Noise robustness; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
  • Print_ISBN
    0-7803-8251-X
  • Type

    conf

  • DOI
    10.1109/ISCAS.2004.1328341
  • Filename
    1328341