Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation

This paper presents the design of a low voltage differential signalling (LVDS) transmitter intended using a LCD panel interface and is capable of transmitting 1GB/s per pin data rate. The transmitter is fully LVDS standard compatible which is achieved by employing a common mode feedback circuit to meet all Ac and DC specifications over PVT variation, specifically due to the implementation of feedback circuit, the common mode variation is made very less quiescent current of 5.5mA. Further, the implementation incorporates the idea of sharing of bias blocks among different transmitters in full chip resulting in less active area. The transmitter is implemented in 3.3V, 0.35μ CMOS technology. In this implementation the active area (excluding ESD) per transmitter is 0.039 mm square. The initial silicon data (output offset voltage of 1.20V and differential voltage of 320mV) at room temperature shows the consistency of the simulation results.