DocumentCode :
418093
Title :
High density VLSI implementation of a bipolar CNN with reduced programmability
Author :
Paasio, Ari ; Flak, Jacek ; Laiho, Mika ; Halonen, Kari
Author_Institution :
Microelectron. Lab, Turku Univ., Finland
Volume :
3
fYear :
2004
fDate :
23-26 May 2004
Abstract :
In this paper a VLSI implementation of a bipolar CNN with a reduced programmability is described. The programmability of the weights and the bias term is reduced to one bit. Since the programming is digital, the template write time is fast. While losing some generality in the programming, the cell array is still able to perform most of the bipolar CNN templates presented so far. The proposed structure yields a very compact realization in a dense layout. The cell size using a 0.18μm digital CMOS process was 155μm2.
Keywords :
CMOS digital integrated circuits; VLSI; cellular neural nets; 0.18 micron; VLSI implementation; bipolar CNN; cell array; cellular neural network; digital CMOS process; digital programming; CMOS process; Cellular neural networks; Circuits; Energy consumption; Hardware; Laboratories; Nonlinear equations; Switches; Variable structure systems; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
Type :
conf
DOI :
10.1109/ISCAS.2004.1328673
Filename :
1328673
Link To Document :
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