DocumentCode :
418186
Title :
An efficient VLSI/FPGA architecture for combining an analysis filterbank following a synthesis filterbank
Author :
Sande, Ravindra K. ; Anantharaman, B.
Author_Institution :
Samsung India Software Operations, Bangalore, India
Volume :
3
fYear :
2004
fDate :
23-26 May 2004
Abstract :
This paper describes an efficient structure to implement a system consisting of an M-channel synthesis filterbank followed by an L-channel analysis filterbank (where M is a multiple of L or L is a multiple of M). The structure is very efficient in VLSI, FPGA or parallel processor implementation in terms of requiring less area or logic blocks, lower power consumption and extending the degree of parallelism. The proposed method is applicable in situations where a subband based processing or encoding follows another subband based processing or decoding and the intermediate synthesized signal is not a desired signal in itself.
Keywords :
VLSI; channel bank filters; field programmable gate arrays; low-power electronics; signal processing; FPGA architecture; L-channel analysis filterbank; M-channel synthesis filterbank; VLSI architecture; intermediate synthesized signal; logic blocks; parallel processor implementation; subband based decoding; subband based encoding; subband based processing; Channel bank filters; Decoding; Echo cancellers; Field programmable gate arrays; Filter bank; Matrix decomposition; Prototypes; Signal processing; Speech enhancement; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
Type :
conf
DOI :
10.1109/ISCAS.2004.1328797
Filename :
1328797
Link To Document :
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