High input range sense comparator for multilevel Flash memories

Author

Cabrini, A. ; Micheloni, R. ; Khouri, O. ; Gregori, S. ; Torelli, G.

Author_Institution

Dept. of Electron., Pavia Univ., Italy

Volume

2

fYear

2004

fDate

23-26 May 2004

Abstract

This paper presents the experimental evaluation of a fully-differential offset-compensated voltage comparator designed for use in multilevel (ML) Flash memory sensing. The comparator is made up by an input buffering stage followed by a gain stage that performs a regenerative action. The input stage, which must provide high input common mode range, is powered by a high-voltage supply V_PP, while the gain stage is operated from the standard supply V_DD, thus limiting current drawing from V_PP. The circuit has been integrated in a 0.13-μm triple-well Flash CMOS process. The experimental evaluation showed an overall comparison time of 35 ns with an input signal of 10 mV and a current consumption of 15 μA from V_PP. These results make the proposed solution well suited for ML sensing.

Keywords

CMOS logic circuits; buffer storage; comparators (circuits); flash memories; integrated circuit design; multivalued logic; network topology; 0.13 micron; 10 V; 15 muA; 35 ns; current consumption; fully-differential offset-compensated voltage comparator design; gain stage; high-voltage supply; input buffering stage; multilevel Flash memory sensing; triple-well Flash CMOS process; Analog-digital conversion; CMOS process; Circuits; Digital cameras; Fabrication; Flash memory; Microelectronics; Performance gain; Threshold voltage; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329357

Filename

1329357