Least squares approximation-based ROM-free direct digital frequency synthesizer

Author

Wen, Ching-Hua ; Hsu, Huai-Yi ; Ko, Hung Yang ; Wu, An-Yeu Andy

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

2

fYear

2004

fDate

23-26 May 2004

Abstract

This paper describes a new design approach and an architecture for a direct digital frequency synthesizer (DDFS) based on least square (LS) approximation. It is shown that the architecture can be implemented as a low-cost, low-power, feedforward, and easily pipelineable datapath. A prototype IC has been designed and fabricated in TSMC 0.25 μm CMOS technology. The IC produces 14-bit sine and cosine outputs with a spurious free dynamic range of 100 dBc. A 32-bit frequency word gives a tuning resolution of 0.0466 Hz at 200 MHz sampling rate.

Keywords

CMOS integrated circuits; direct digital synthesis; integrated circuit design; least squares approximations; low-power electronics; read-only storage; spectral analysis; 0.0466 Hz; 0.25 micron; 200 MHz; 32 bit; CMOS technology; IC design; LSA; ROM; complementary metal oxide semiconductor; direct digital frequency synthesizer; feedforward datapath; frequency word; integrated circuit design; least squares approximation; pipelineable datapath; power consumption; sampling rate; spurious free dynamic range; CMOS technology; Costs; Curve fitting; Dynamic range; Frequency conversion; Frequency synthesizers; Least squares approximation; Polynomials; Signal resolution; Signal synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329368

Filename

1329368