DocumentCode
418530
Title
Low-power implementation of polyphase filters in Quadratic Residue Number system
Author
Cardarilli, G.C. ; Del Re, A. ; Nannarelli, A. ; Re, M.
Author_Institution
Dept. of Electr. Eng., Univ. of Rome "Tor Vergata", Italy
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
The aim of this work is the reduction of the power dissipated in digital filters, while maintaining the timing unchanged. A polyphase filter bank in the Quadratic Residue Number System (QRNS) has been implemented and then compared, in terms of performance, area, and power dissipation to the implementation of a polyphase filter bank in the traditional two´s complement system (TCS). The resulting implementations, designed to have the same clock rates, show that the QRNS filter is smaller and consumes less power than the TCS one.
Keywords
digital filters; low-power electronics; residue number systems; clock rate; digital filters; low power implementation; polyphase filters; power consumption; power dissipation; quadratic residue number system; two´s complement system; Channel bank filters; Digital video broadcasting; Dynamic range; Energy consumption; Filter bank; Finite impulse response filter; Frequency; Power dissipation; Satellite broadcasting; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329374
Filename
1329374
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