Title :
Design of residue-to-binary converter for a new 5-moduli superset residue number system
Author :
Cao, Bin ; Srikanthan, Thambipillai ; Chang, Chip-Hong
Author_Institution :
Centre for High Performance Embedded Syst., Nanyang Technol. Univ., Singapore
Abstract :
This paper presents an efficient residue-to-binary (R/B) conversion algorithm for a new 5-moduli superset {2n-1, 2n, 2n+1, 2n+1-1, 2n-1-1} residue number system (RNS) when n is even. The new moduli set is provided for larger dynamic range and higher parallelism. Our R/B conversion algorithm is based on a 4-moduli set R/B converter and the mixed-radix conversion (MRC) technique. The proposed architecture is built around full adders, which can be easily pipelined to achieve high throughput rate. Our investigations show that the resulting architecture is notably more efficient than that proposed for an existing 5-moduli set RNS in terms of area, delay and power consumption.
Keywords :
adders; convertors; number theory; power consumption; residue number systems; 4 moduli set residue-binary converter; 5 moduli superset residue number system; RNS; mixed radix conversion; power consumption; residue number system; residue-binary conversion algorithm; residue-binary converter; Adders; Arithmetic; Delay; Dynamic range; Embedded system; Energy consumption; Signal processing algorithms; Table lookup; Throughput; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329403