Title :
Design techniques for Pulsed Static CMOS
Author :
Seshadri, Kavitha ; Pontarelli, Adrianne ; Joglekar, Gauri ; Sobelman, Gerald E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., USA
Abstract :
This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.
Keywords :
CMOS integrated circuits; CMOS logic circuits; adders; carry logic; integrated circuit design; arithmetic functions; array multiplier; carry select adder; pulsed static CMOS circuit design; pulsed static CMOS circuit simulation; throughput; Adders; Arithmetic; CMOS digital integrated circuits; Capacitance; Circuit noise; Circuit simulation; MOSFETs; Pulse circuits; Throughput; Topology;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329425
