DocumentCode :
418875
Title :
Loss reduction methods for planar circuit designs on lossy substrates
Author :
Itotia, Isaac K. ; Drayton, Rhonda Franklin
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
Volume :
2
fYear :
2004
fDate :
20-25 June 2004
Firstpage :
1447
Abstract :
Loss reduction methods using porous silicon for the design of filters on lossy substrates are investigated. The results show that the underlying bulk silicon properties play an important role in the resulting performance of the filter. Reduction in the thickness of the lossy underlying bulk silicon leads to a 30% decrease in the insertion loss in the passband (at 10 GHz) and as 35% improvement in the stopband performance (35 GHz).
Keywords :
CMOS integrated circuits; band-pass filters; band-stop filters; integrated circuit design; integrated circuit modelling; integrated circuit technology; microwave filters; microwave integrated circuits; monolithic integrated circuits; semiconductor device models; silicon; substrates; 10 GHz; 35 GHz; CMOS fabrication technologies; RF passive circuit performance; Si; bulk silicon properties; insertion loss; integrated wireless communication systems; loss reduction methods; lossy substrates; passband; planar circuit designs; porous silicon; stopband; substrate thickness; test circuit models; Circuits; Conducting materials; Dielectric materials; Fabrication; Filters; Insertion loss; Performance loss; Radio frequency; Silicon; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Antennas and Propagation Society International Symposium, 2004. IEEE
Print_ISBN :
0-7803-8302-8
Type :
conf
DOI :
10.1109/APS.2004.1330460
Filename :
1330460
Link To Document :
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