DocumentCode :
420451
Title :
High yield reduced process tolerance self-aligned double mesa process technology for SiGe power HBTs
Author :
Lee, Kok-Yan ; Johnson, Brian N. ; Mohammadi, Saeed ; Bhattacharya, Pallab K. ; Katehi, Linda P B
Author_Institution :
Michigan Univ., Ann Arbor, MI, USA
Volume :
2
fYear :
2004
fDate :
6-11 June 2004
Firstpage :
963
Abstract :
Two novel high yield reduced process tolerance process technologies were developed for double mesa SiGe power HBT. DC and RF results from both 10 and 20 finger devices were presented. A reduced tolerance process is essential in the further development of MMICs using these transistors.
Keywords :
Ge-Si alloys; chemical vapour deposition; elemental semiconductors; heterojunction bipolar transistors; integrated circuit yield; power bipolar transistors; secondary ion mass spectra; silicon; DC result; MMIC; RF result; Si-SiGe-Si; SiGe power HBT; finger devices; high yield reduced tolerance process; self aligned double mesa process technology; Chemical vapor deposition; Etching; Germanium silicon alloys; Heterojunction bipolar transistors; Lithography; MMICs; Microwave transistors; Optical devices; Radio frequency; Silicon germanium;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium Digest, 2004 IEEE MTT-S International
ISSN :
0149-645X
Print_ISBN :
0-7803-8331-1
Type :
conf
DOI :
10.1109/MWSYM.2004.1339137
Filename :
1339137
Link To Document :
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