Title :
Implementation of JPEG2000 arithmetic decoder on a dynamically reconfigurable ATMEL FPGA
Author :
Bouchoux, Sophie ; Bourennane, El-Bay ; Miteran, Johel ; Paindavoine, Michel
Author_Institution :
Univ. de Bourgogne, France
Abstract :
This paper is about the implementation of a part of the JPEG2000 algorithm (MQ-decoder and arithmetic decoder) in a FPGA by using dynamic reconfiguration. The implementation is done on an architecture named ARDOISE, created to study fine grain dynamic reconfiguration of FPGAs.
Keywords :
arithmetic codes; code standards; field programmable gate arrays; reconfigurable architectures; ARDOISE; ATMEL FPGA; JPEG2000 algorithm; JPEG2000 arithmetic decoder; MQ-decoder; fine grain dynamic reconfiguration; Arithmetic; Computer architecture; Costs; Decoding; Field programmable gate arrays; Frequency; Neural networks; Partitioning algorithms; Tiles; Transform coding;
Conference_Titel :
VLSI, 2004. Proceedings. IEEE Computer society Annual Symposium on
Print_ISBN :
0-7695-2097-9
DOI :
10.1109/ISVLSI.2004.1339540
