RC interconnect circuits and its balanced truncated models

Advance of high-speed deep-submicron VLSI technology requires chip interconnect and packaging to be modeled by distributed circuits. Such a detailed modeling level eventually results in large scale linear circuits to be analyzed. Here, even distributed RC interconnect models and their closed-forms are discussed and presented. The obvious advantage is to avoid difficulty of taking very large dimension matrix inverse that exists in previous conventional methods. Then, the balanced truncation method is applied to two even distributed RC interconnect cases by using these closed-forms of the models. The results show that extremely high order RC interconnect can be high-accurately approximated by only the third or higher order balanced model. When the source and load ports are included, the whole model may be approximated by the second or the first order balanced model. Simulations are executed in both time and frequency domains. The results may be applied to VLSI interconnect model reduction and design.