DocumentCode
421370
Title
Task scheduling for heterogeneous reconfigurable computers
Author
Ahmadinia, Ali ; Bobda, Christophe ; Koch, Dirk ; Majer, Mateusz ; Teich, Jurgen
Author_Institution
Dept. of Comput. Sci., Erlangen-Nurnberg Univ., Erlangen, Germany
fYear
2004
fDate
7-11 Sept. 2004
Firstpage
22
Lastpage
27
Abstract
We consider the problem of executing a dynamically changing set of tasks on a reconfigurable system, made upon a processor and a reconfigurable device. Task execution on such a platform is managed by a scheduler that can allocate tasks either to the processor or to the reconfigurable device. The scheduler can be seen as part of an operating system running on the software or as core in the reconfigurable device. For each tasks to be executed on reconfigurable device, an equivalent implementation exists as rectangular block in a database. This block has to be placed on the device at run-time. A placer is responsible for the placement of tasks received from the scheduler on the reconfigurable device. However, the placement of tasks on the reconfigurable device cannot be successful if enough space is not available on the device to hold the task. In this case, the scheduler receive an acknowledgment from the placer and decide either to preempt a running task or to run the task on software. We present in this work an implementation of a placer module as well as investigations on task preemption. The two modules are part of an operating system for reconfigurable system currently under development.
Keywords
electronic engineering computing; field programmable gate arrays; operating systems (computers); processor scheduling; reconfigurable architectures; databases; field programmable gate arrays; heterogeneous reconfigurable computers; operating system; reconfigurable device; task scheduling; Aging; Computer science; Databases; Design engineering; Field programmable gate arrays; Hardware; Operating systems; Permission; Processor scheduling; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits and Systems Design, 2004. SBCCI 2004. 17th Symposium on
Print_ISBN
1-58113-947-0
Type
conf
DOI
10.1109/SBCCI.2004.240919
Filename
1360538
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