ATPG for fault diagnosis on analog electrical networks using evolutionary techniques

Author

Savioli, C.E.F. ; Szendrodi, C.E.C. ; Calvano, J.V. ; Mesquita, A.C.

Author_Institution

Brazilian Navy Electron. Center, Rio de Janeiro, Brazil

fYear

2004

fDate

7-11 Sept. 2004

Firstpage

100

Lastpage

104

Abstract

This paper proposes a method for automated test pattern generation for fault diagnosis on continuous-time analog electrical networks based on evolutionary techniques. The paper states a method for coding a generic algorithm, based on a given heuristic, that are able to generate a set of optimum frequencies capable of disclosing parametric faults. The method itself is generic, and not based on specific or ad hoc features at all.

Keywords

automatic test pattern generation; circuit optimisation; continuous time filters; fault diagnosis; genetic algorithms; integrated circuit testing; mixed analogue-digital integrated circuits; ATPG; ad hoc features; automated test pattern generation; continuous time analog electrical networks; evolutionary techniques; fault diagnosis; generic algorithm; integrated circuit testing; mixed analogue-digital integrated circuits; optimum frequencies; parametric faults; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit synthesis; Circuit testing; Fault diagnosis; Frequency; Genetic algorithms; Large scale integration; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits and Systems Design, 2004. SBCCI 2004. 17th Symposium on

Print_ISBN

1-58113-947-0

Type

conf

DOI

10.1109/SBCCI.2004.241287

Filename

1360552