Title :
Cognitive Architectures for Sensory Processing
Author :
Principe, Jose C. ; Chalasani, Rakesh
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL, USA
Abstract :
This paper describes our efforts to design a cognitive architecture for object recognition in video. Unlike most efforts in computer vision, our work proposes a Bayesian approach to object recognition in video, using a hierarchical, distributed architecture of dynamic processing elements that learns in a self-organizing way to cluster objects in the video input. A biologically inspired innovation is to implement a top-down pathway across layers in the form of causes, creating effectively a bidirectional processing architecture with feedback. To simplify discrimination, overcomplete representations are utilized. Both inference and parameter learning are performed using empirical priors, while imposing appropriate sparseness constraints. Preliminary results show that the cognitive architecture has features that resemble the functional organization of the early visual cortex. One example showing the use of top-down connections is given to disambiguate a synthetic video from correlated noise.
Keywords :
belief networks; cognition; computer vision; correlation theory; human computer interaction; inference mechanisms; object recognition; video signal processing; Bayesian approach; bidirectional processing architecture; biologically inspired innovation; cluster object; cognitive architecture; computer vision; correlated noise; distributed architecture; dynamic processing elements; early visual cortex; feedback; functional organization; hierarchical architecture; inference learning; object recognition; parameter learning; sensory processing; sparseness constraint; synthetic video; top-down approach; Bayes methods; Cognitive science; Computational modeling; Computer architecture; Data models; Object recognition; Predictive models; Empirical Bayes; object recognition; top–down; visual cortex;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/JPROC.2014.2307023