Investigation of the effects of DSP timer jitter on the measurement of a PWM controlled inverter output voltage and current

This paper presents an investigation into the effects of timer jitter on the accuracy of measured results when using a digital signal processor card in a PC based measurement system. These results are particularly applicable for drive system engineers. Jitter is the error between the ideal sampling period and the actual sampling period. Timer jitter has different effects on the accuracy of the measured output depending upon the type of signal to be measured. Current sampling frequencies (10-20 kHz) of typical DSP systems are too low for the measurement of PWM waveforms in power applications. Timer error means that pulses that are small in width may be missed when sampled, even if the measurement system is synchronized with the PWM generation. The resulting sampled data misrepresents the actual waveform. However, the error as a result of timer jitter in the measured data is negligible when sampling sinusoidal or slow changing waveforms. Experimental results are presented to show the effect of timer error. Timer jitter was measured and found to be as high as +/-10% for a stated sampling period of 50 /spl mu/s for the DSP card being used. Timer jitter had a negligible effect on the sampled data when the signal was a near sinusoidal waveform. Spectral analysis was also undertaken to highlight the results. Computer simulated results confirmed the errors produced by timer jitter.