DocumentCode :
423270
Title :
EXIT chart analysis for iterative timing recovery
Author :
Kovintavewat, Piya ; Barry, John R.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume :
4
fYear :
2004
fDate :
29 Nov.-3 Dec. 2004
Firstpage :
2435
Abstract :
Performance analysis of iterative timing recovery schemes, which perform timing recovery, equalization, and error-correction decoding jointly, is difficult because of their complexity. In this paper, we apply the extrinsic information transfer chart (EXIT chart) analysis as a tool to compare and predict their performances. Simulation results indicate that the system performance predicted by the EXIT chart coincides with that obtained by simulating data transmission over a complete iterative receiver, especially when the coded block length is large.
Keywords :
equalisers; error correction codes; error statistics; iterative decoding; synchronisation; BER; EXIT chart analysis; PSP; equalization; error-correction decoding; extrinsic information transfer chart analysis; iterative error-correction codes; iterative receiver; iterative timing recovery; large coded block length; per-survivor processing; Adaptive equalizers; Bit error rate; Computational modeling; Computer errors; Data communication; Information analysis; Iterative decoding; Performance analysis; Predictive models; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Global Telecommunications Conference, 2004. GLOBECOM '04. IEEE
Print_ISBN :
0-7803-8794-5
Type :
conf
DOI :
10.1109/GLOCOM.2004.1378444
Filename :
1378444
Link To Document :
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