DocumentCode :
423947
Title :
On-chip contrastive divergence learning in analogue VLSI
Author :
Fleury, Patrice ; Chen, Hsin ; Murray, Alan F.
Author_Institution :
Inst. for Integrated Micro & Nano Syst., Edinburgh Univ., UK
Volume :
3
fYear :
2004
fDate :
25-29 July 2004
Firstpage :
1723
Abstract :
We have mapped the contrastive divergence learning scheme of the product of experts (PoE) onto electrical circuits. The issues raised during that hardware translation are discussed in This work and some circuits presenting our solutions are described. The entire learning rule is implemented in mixed-signal VLSI on a 0.6 μm CMOS process. Chips results validating our approach and methodology are also presented.
Keywords :
CMOS integrated circuits; VLSI; mixed analogue-digital integrated circuits; neural chips; stochastic processes; system-on-chip; unsupervised learning; 0.6 micron; CMOS process; analogue VLSI; electrical circuits; hardware translation; mixed signal VLSI; onchip contrastive divergence learning; product of experts; stochastic processes; CMOS process; Circuits; Neural network hardware; Neural networks; Neurons; Signal processing; Stochastic processes; System-on-a-chip; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 2004. Proceedings. 2004 IEEE International Joint Conference on
ISSN :
1098-7576
Print_ISBN :
0-7803-8359-1
Type :
conf
DOI :
10.1109/IJCNN.2004.1380863
Filename :
1380863
Link To Document :
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