DocumentCode
424418
Title
A New Algorithm for Improved VDD Assignment in Low Power Dual VDD Systems
Author
Kulkarni, S.H. ; Srivastava, A.N. ; Sylvester, Dennis
Author_Institution
University of Michigan, Ann Arbor, MI
fYear
2004
fDate
11-11 Aug. 2004
Firstpage
200
Lastpage
205
Abstract
We present the first in-depth study of the two existing algorithms, namely, Clustered Voltage Scaling (CVS) and Extended Clustered Voltage Scaling (ECVS), used for assigning the voltage supply to gates in integrated circuits having dual power supplies. We present a comparison of the achievable power savings using these algorithms on various benchmark circuits and first point out that ECVS does provide appreciably larger power improvements compared to CVS. We then provide a new algorithm based on ECVS that further improves the power savings by efficient assignment of the power supplies to the gates. Our new algorithm provides up to 66% power reduction and improves the power savings by up to 28% and 13% with respect to CVS and ECVS respectively. Furthermore, since level conversion is an essential component of dual power supply systems we also present the first circuit-specific sensitivity study of achievable power savings to the energy and delay penalties imposed by level conversion.
Keywords
CVS; Dual VDD Design; ECVS; Level Converters; Low Power Design Algorithms; CVS; Dual VDD Design; ECVS; Level Converters; Low Power Design Algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 2004. ISLPED '04. Proceedings of the 2004 International Symposium on
Conference_Location
Newport Beach, CA, USA
Print_ISBN
1-58113-929-2
Type
conf
Filename
1382989
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