DocumentCode :
42495
Title :
Design and Implementation of an Embedded Coprocessor with Native Support for 5D, Quadruple-Based Clifford Algebra
Author :
Franchini, Silvia ; Gentile, Ann ; Sorbello, F. ; Vassallo, Giorgio ; Vitabile, S.
Author_Institution :
DICGIM Dept., Univ. of Palermo, Palermo, Italy
Volume :
62
Issue :
12
fYear :
2013
fDate :
Dec. 2013
Firstpage :
2366
Lastpage :
2381
Abstract :
Geometric or Clifford algebra (CA) is a powerful mathematical tool that offers a natural and intuitive way to model geometric facts in a number of research fields, such as robotics, machine vision, and computer graphics. Operating in higher dimensional spaces, its practical use is hindered, however, by a significant computational cost, only partially addressed by dedicated software libraries and hardware/software codesigns. For low-dimensional algebras, several dedicated hardware accelerators and coprocessing architectures have been already proposed in the literature. This paper introduces the architecture of CliffordALU5, an embedded coprocessing core conceived for native execution of up to 5D CA operations. CliffordALU5 exploits a novel, hardware-oriented representation of the algebra elements that allows for faster execution of Clifford operations. In this paper, a prototype implementation of a complete system-on-chip (SOC) based on CliffordALU5 is presented. This prototype integrates an embedded processing soft-core based on the PowerPC 405 and a CliffordALU5 coprocessor on a Xilinx XUPV2P Field Programmable Gate Array (FPGA) board. Test results show a 5× average speedup for 4D Clifford products and a 4× average speedup for 5D Clifford products against the same operations in Gaigen 2, a CA software library generator running on the general-purpose PowerPC processor. This paper also presents an execution analysis of three different applications in three diverse domains, namely, inverse kinematics of a robot, optical motion capture, and raytracing, showing an average speedup between 3× and 4× with respect to the baseline Gaigen 2 implementation. Finally, a multicore approach to higher dimensional CA based on CliffordALU5 is discussed.
Keywords :
algebra; coprocessors; embedded systems; field programmable gate arrays; system-on-chip; CA; CliffordALU5 coprocessor; FPGA; PowerPC 405; SOC; Xilinx XUPV2P Field Programmable Gate Array; computer graphics; coprocessing architectures; embedded coprocessor; geometric facts; hardware accelerators; hardware oriented representation; hardware-software codesigns; machine vision; native support; quadruple based Clifford algebra; robotics; software libraries; software library generator; system-on-chip; Algebra; Computational modeling; Computer architecture; Coprocessors; Embedded systems; Field programmable gate arrays; Clifford algebra; FPGA-based prototyping; application-specific processors; computational geometry; embedded coprocessors;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2012.225
Filename :
6302125
Link To Document :
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