Security vs. test quality: fully embedded test approaches are the key to having both

Fully embedded at-speed structural test approaches are growing in use over the past several years. For random logic testing, the full scan ATPG methodology provides a fully external test approach. The more recent ATPG compression based methodologies represent a hybrid approach consisting of some internal IP as well as reduced external scan test data. Finally the logic BIST methodology represents a fully embedded test approach requiring no external test data. The embedded test provides two distinct security benefits. The first of these benefits is IP protection. The other security issue is access to sensitive data stored inside the device once it is active in the field.