Title :
High power planar interconnect for high frequency converters
Author :
Fillion, Ray ; Delgado, Eladio ; Beaupre, Richard ; McConnelee, Paul
Author_Institution :
GE Global Res., Niskayuna, NY, USA
Abstract :
This paper describes the P4© power process, structure and materials and provide performance and reliability test data. Power electronic device technologies have been making significant performance improvement over the past decade, similar to but perhaps not as breath taking as the changes made in digital microelectronics. Power device technology is going to higher voltage levels, higher current level and faster switching speed. The on-resistance, RDS(on) in MOSFETs dropped by a factor of 3× from 1997 to 2000 with improvements driven by "higher cell densities, shorter channels, thinner gate oxides and lower substrate resistance through lower resistivity materials and thinner wafers. Switching losses also have been reduced with narrower polysilicon lines and trenches and shallower junctions as stated in A. Lidow (for original article see APEC 2003) and A. Lidow (1999). Higher switching speeds are being realized in IGBTs by better control of the injection level and minority carrier lifetime. Finally, lower and better controlled VCE(on), have been achieve with higher density designs and self-aligning processes according to Al Lidow (2003). Diodes are delivering shorter reverse recovery times with less switching noise and faster soft recover with less overshoot and reduced EMI. Power electronics is also a growing industry with total power device sales of 43 billion devices ($ ∼4 billion) in 1999 growing to 84 billion devices (∼ $8 billion) in 2004.
Keywords :
chip scale packaging; flip-chip devices; integrated circuit interconnections; lead bonding; power integrated circuits; MOSFET; chip packages; device reliability; digital microelectronics; flip chip devices; high density designs; high frequency converters; high power planar interconnect; innovative interconnect; metallurgical connection; planar power polymer packaging; polysilicon lines; polysilicon trenches; power electronic devices; power semiconductor devices; switching losses; wire bond chip connections; wire packages; Conductivity; Frequency conversion; Insulated gate bipolar transistors; MOSFETs; Materials reliability; Materials testing; Microelectronics; Power electronics; Switching loss; Voltage;
Conference_Titel :
Electronics Packaging Technology Conference, 2004. EPTC 2004. Proceedings of 6th
Print_ISBN :
0-7803-8821-6
DOI :
10.1109/EPTC.2004.1396570