DocumentCode
427825
Title
Analysis and specialisation of a PIC processor
Author
Henriksen, Kim S. ; Gallagher, John P.
Author_Institution
Comput. Sci., Roskilde Univ., Denmark
Volume
2
fYear
2004
fDate
10-13 Oct. 2004
Firstpage
1131
Abstract
The functionality of a classic PIC processor, commonly used in applications such as wearable computing, has been modelled as an emulator written in Prolog. The PIC emulator can be specialised using an online or offline partial evaluator, which are part of an analysis and specialisation toolset for logic programs developed in the ASAP project. The program is specialised with respect to a given program and given characteristic of environments such as regular patterns on communication channels. Analysis techniques can now be applied to the specialised emulator in an attempt to discover properties of the PIC program, such as constant or undefined register values, timing and synchronisation when connecting more than one PIC processor running concurrently and communicating - and detection of dead code and other forms of redundancy.
Keywords
PROLOG; microcontrollers; program diagnostics; program processors; ASAP project; PIC emulator; PIC processor; Prolog; dead code detection; logic programs; partial evaluator; processor analysis; processor specialisation; undefined register values; wearable computing; Application software; Communication channels; Computer science; Emulation; Joining processes; Logic; Microcontrollers; Registers; Timing; Wearable computers;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Man and Cybernetics, 2004 IEEE International Conference on
ISSN
1062-922X
Print_ISBN
0-7803-8566-7
Type
conf
DOI
10.1109/ICSMC.2004.1399774
Filename
1399774
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