Title :
Using a self-organizing neural network for wafer defect inspection
Author :
Chang, Chuan-Yu ; Chang, Jia-Wei ; Jeng, MuDer
Author_Institution :
Dept. of Electron. Eng., Nat. Yunlin Univ. of Sci. & Technol., Taiwan
Abstract :
Wafer defect inspection is an important process before die packaging. The defective regions are usually identified through visual judgment with the aid of a scanning electron microscope. Five to ten people visually check wafers and hand-mark their defective regions. By this means, potential misjudgment may be introduced due to human fatigue. In addition, the process can incur significant personnel costs. Self-organizing neural networks (SONN) have been proven to have the capabilities of auto-clustering. Automated wafer inspection based on a self-organizing neural network is proposed to replace the traditional electrical testing and the human inspection process. Based on real world data, experimental results show that the proposed method successfully identifies the defective regions on wafers with good performances.
Keywords :
automatic optical inspection; integrated circuit manufacture; neural nets; self-organising feature maps; unsupervised learning; scanning electron microscope; self-organizing neural network; unsupervised learning; wafer defect inspection; Circuit testing; Costs; Electronics packaging; Fatigue; Inspection; Marine technology; Microscopy; Neural networks; Oceans; Sawing;
Conference_Titel :
Systems, Man and Cybernetics, 2004 IEEE International Conference on
Print_ISBN :
0-7803-8566-7
DOI :
10.1109/ICSMC.2004.1401209