Title :
Reconfigurable IP blocks: a survey [SoC]
Abstract :
An extensive survey concentrating totally on reconfigurable IP blocks is given. The most remarkable prevailing implementations are categorized according to the computational granularity, communication topology and source of block, i.e. academic vs. commercial. Also our own research results in this field are included in the classification.
Keywords :
circuit CAD; field programmable gate arrays; industrial property; integrated circuit design; logic CAD; reconfigurable architectures; system-on-chip; FPGA; IP block source; SoC; communication topology; computational granularity; prevailing implementations; reconfigurable IP blocks; system-on-chip; Character generation; Field programmable gate arrays; Hardware; Intellectual property; Large scale integration; Manufacturing processes; Silicon; Table lookup; Topology; Very large scale integration;
Conference_Titel :
System-on-Chip, 2004. Proceedings. 2004 International Symposium on
Print_ISBN :
0-7803-8558-6
DOI :
10.1109/ISSOC.2004.1411163
