DocumentCode
430639
Title
An alternative scheme of redundant binary multiplier
Author
Chang, Chip-Hong ; He, Yajuan ; Gu, Jiangmin
Author_Institution
Center for Integrated Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore
Volume
1
fYear
2004
fDate
6-9 Dec. 2004
Firstpage
33
Abstract
This work addresses the feasibility of re-engineering the multiplier architecture that is based on a new redundant number representation called the non-carry-propagation (NCP) format to avoid carry propagation. The preliminary theoretical assessments and simulation result show that this multiplier possesses certain revelatory features that make it a potential alternative approach to conventional redundant binary multiplier. The characteristics of NCP number and the structure of NCP adders array are analyzed. A new reverse converter was also proposed to simplify the converter circuit that converts the final redundant binary number into the corresponding 2´s complement number. A recommended gate-level implementation of the multiplier based on this new architecture is also presented.
Keywords
adders; multiplying circuits; redundant number systems; NCP adders array; NCP number; converter circuit; gate-level implementation; multiplier architecture re-engineering; noncarry-propagation format; redundant binary multiplier; redundant number representation; reverse converter; Adders; Algorithm design and analysis; Arithmetic; Circuit simulation; Digital filters; Encoding; Helium; Integrated circuit technology; Niobium; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN
0-7803-8660-4
Type
conf
DOI
10.1109/APCCAS.2004.1412684
Filename
1412684
Link To Document