DocumentCode
430643
Title
A Petri net based timing model for hardware/software co-design of digital systems
Author
Marranghello, N. ; De Oliveira, K. L A ; Damian, F.
Author_Institution
Sao Paulo State Univ., Brazil
Volume
1
fYear
2004
fDate
6-9 Dec. 2004
Firstpage
65
Abstract
We have recently proposed an extension to Petri nets in order to be able to directly deal with all aspects of embedded digital systems. This extension is meant to be used as an internal model of our co-design environment. After analyzing relevant related work, and presenting a short introduction to our extension as a background material we describe the details of the timing model we use in our approach, which is mainly based in Merlin´s time model. We conclude the paper by discussing an example of its usage.
Keywords
Petri nets; embedded systems; hardware-software codesign; timing; Petri net; embedded digital systems; hardware-software codesign; timing model; Computational modeling; Computer science; Digital systems; Field programmable gate arrays; Hardware design languages; Interference constraints; Network-on-a-chip; Petri nets; Time to market; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Print_ISBN
0-7803-8660-4
Type
conf
DOI
10.1109/APCCAS.2004.1412692
Filename
1412692
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