Title :
Hardware design in statement level parallel processing
Author :
Shimoo, Kosei ; Yamawaki, Akira ; Iwane, M.
Author_Institution :
Dept. of Electr. Eng., Kyushu Inst. of Technol., Fukuoka
Abstract :
This paper describes a hardware design method extracting parallelisms from a C program. Also, the effect of extracting parallelisms to design a hardware is clarified through the experiments using some programs. The result shows that extracting parallelisms improves the performance of 2.08 times at average compared to the hardware that does not employ the parallelization
Keywords :
C language; hardware-software codesign; parallel processing; parallelising compilers; C program; hardware design; parallelism extraction; statement level parallel processing; Costs; Data analysis; Data mining; Design methodology; Hardware design languages; High level languages; Parallel processing; Processor scheduling; Very large scale integration; Yarn;
Conference_Titel :
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Conference_Location :
Tainan
Print_ISBN :
0-7803-8660-4
DOI :
10.1109/APCCAS.2004.1412758
