DocumentCode
430695
Title
Digital signal processor architectures and programming
Author
Kuo, Sen M. ; Gan, Woon S.
Author_Institution
Dept. of Electr. Eng., Northern Illinois Univ., DeKalb, IL
Volume
1
fYear
2004
fDate
6-9 Dec. 2004
Firstpage
365
Abstract
This paper presents modern digital signal processor architectures including multiply-accumulate unit, shifter, pipelining and parallelism, buses, data address generators, and special addressing modes and instructions. In addition, the most effective mixed C and assembly programming technique is suggested for software development
Keywords
digital signal processing chips; program assemblers; DSP programming; assembly programming; buses; data address generators; digital signal processor architecture; mixed C; multiply-accumulate unit; parallelism; pipelining; shifter; software development; special addressing; Assembly; Cellular phones; Digital signal processing; Digital signal processors; Hardware; Modems; Programming; Signal processing; Signal processing algorithms; Standards development;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on
Conference_Location
Tainan
Print_ISBN
0-7803-8660-4
Type
conf
DOI
10.1109/APCCAS.2004.1412771
Filename
1412771
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