Title :
A Historical Review of Low-Power, Low-Voltage Digital MOS Circuits Development
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Abstract :
The development of low-power (LP), low-voltage (LV) (or LPLV) digital MOS circuits, fueled by a strong need for highend microcomputers (MPUs) and explosive growth in portable systems, has surely contributed to the current boom in MOS large-scale integration (LSI). This article reviews such digital MOS circuits as they have been developed over the last 50 years, since the advent of integrated circuits (ICs). A particular emphasis is placed on MPUs, systems-on-a-chip (SoCs), and SRAMs and DRAMs; the discussion is based mainly on papers presented at the International Solid-State Circuits Conference (ISSCC) and the Symposium on VLSI Circuits. Flash memories that necessitate unique circuits for high density rather than low power and high speed are excluded.
Keywords :
DRAM chips; MOS digital integrated circuits; SRAM chips; VLSI; low-power electronics; system-on-chip; DRAM; International Solid-State Circuits Conference; MOS large-scale integration; SRAM; Symposium on VLSI Circuits; flash memories; high-end microcomputers; integrated circuits; low-power low-voltage digital MOS circuits development; portable systems; systems-on-a-chip; CMOS integrated circuits; Computer architecture; Digital circuits; History; Low power electronics; MOSFETs; Microprocessors; Random access memory; System-on-a-chip; Voltage control;
Journal_Title :
Solid-State Circuits Magazine, IEEE
DOI :
10.1109/MSSC.2012.2230833
