A high-speed processing LSI for RSA cryptograms using an improved adder circuit

In this work we propose a high-speed calculating method using a signed-digit number system and describe a high speed LSI developed based on this method for RSA cryptogram processing. Operations for the RSA cryptogram take a long time because they require a great deal of calculations. To improve operation speeds we proposed in our earlier work calculating method using a general radix-2^k signed-digit number system and develop LSI for RSA cryptogram processing. In this work, we improve this radix-2^k signed-digit number system to make it easy to implement in hardware. By applying this method to LSI, we achieve processing speeds 9 times faster than the previous method.