DocumentCode
430998
Title
A method of speculative dual-path execution for VLIW processors
Author
Shimajiri, Hiroyuki ; Yoshida, Takeo
Author_Institution
Dept. of Inf. Eng., Ryukyus Univ., Okinawa, Japan
Volume
B
fYear
2004
fDate
21-24 Nov. 2004
Firstpage
195
Abstract
VLIW processors are widely implemented in embedded computer systems that require low power consumption and small area. However, there is a major problem that VLIW processors execute many NOP operations while running a nonnumerical application. To solve this problem, we propose a new method of speculative multipath execution using a small and simple dynamic scheduling mechanism for VLIW processors. While speculatively executing, a VLIW processor applied our method merges both VLIW instructions of branch paths into one instruction by using NOP operations. It can simultaneously execute both paths by executing merged VLIW instructions. By applying our method to VLIW processors, they are able to reduce the number of executing NOP operations and to improve their performance. We compare IPCs of the VLIW processor applied our method and a VLIW processor applied the delayed branch method. Our simulation results on SPECint95 benchmarks show that our method can achieve from 18% to 33% and from 72% to 132% IPC improvement when the branch latency is one cycle and four cycles respectively.
Keywords
embedded systems; parallel architectures; processor scheduling; VLIW processors; dual-path merging method; embedded computer system; speculative multipath execution; Application software; Delay; Dynamic scheduling; Embedded computing; Hardware; Merging; Power engineering and energy; Power engineering computing; Processor scheduling; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON 2004. 2004 IEEE Region 10 Conference
Print_ISBN
0-7803-8560-8
Type
conf
DOI
10.1109/TENCON.2004.1414565
Filename
1414565
Link To Document