FFT-accelerated iterative MIMO chip equalizer architecture for CDMA downlink

In this paper, we present a novel FFT-accelerated iterative linear MMSE chip equalizer in the MIMO CDMA downlink receiver. The reversed form time-domain matrix multiplication in the conjugate gradient (CG) iteration is accelerated by an equivalent frequency-domain circular convolution with FFT-based "overlap-save" architecture. The iteration rapidly refines a crude initial approximation to the actual final equalizer taps. This avoids the direct-matrix-inverse with O((NL)³) complexity, and reduces the standard CG complexity from O((NL)²) to O(NLlog₂(NL)). Simulation demonstrates strong numerical stability and promising performance/complexity tradeoff, especially for very long channels.