DocumentCode
432711
Title
Real-time H.24-AVC codec on Intel architectures
Author
Iverson, Vaughn ; McVeigh, Jeff ; Reese, Bob
Volume
2
fYear
2004
fDate
24-27 Oct. 2004
Firstpage
757
Abstract
The impressive coding efficiency of H.264-AVC comes at the expense of significantly increased algorithm complexity compared to existing standards, which has limited the availability of cost-effective, high-performance solutions. We present a design overview and implementation details of the compliant code optimized for the Intel® Pentium®4 Pentium®M and Xscale™ microarchitectures, including results for encoder rate-distortion performance and encoder/decoder execution speed on the above processors. These results demonstrate that high-quality, real-time H.264/AVC recording and playback are achievable on today´s PC (desktop and notebook) platforms and that real-time playback on handheld (mobile phone/portable media player) platforms can also be achieved, with both implemented as optimized software for these general-purpose processor architectures.
Keywords
computer architecture; digital signal processing chips; rate distortion theory; real-time systems; video codecs; video coding; H.264-AVC codec; Intel architecture; Pentium-4 architecture; Pentium-M architecture; Xscale microarchitecture; advanced video coding standard; coding efficiency; rate-distortion performance; Automatic voltage control; Availability; Codecs; Computer architecture; Decoding; Design optimization; Microarchitecture; Mobile handsets; Portable media players; Rate-distortion;
fLanguage
English
Publisher
ieee
Conference_Titel
Image Processing, 2004. ICIP '04. 2004 International Conference on
ISSN
1522-4880
Print_ISBN
0-7803-8554-3
Type
conf
DOI
10.1109/ICIP.2004.1419408
Filename
1419408
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