DocumentCode
432839
Title
An Application Analysis Framework For Polymorphic Chip Multiprocessors
Author
Thomas, Ayodele ; Olukotun, Kunle
Author_Institution
Stanford Univ., Palo Alto, CA, USA
fYear
2005
fDate
04-08 April 2005
Abstract
The SAPIENT parallel analysis framework facilitates the efficient transformation of sequential applications into multilevel parallel applications that can be executed on polymorphic chip multiprocessor architectures. We demonstrate how application characteristics are used to detect thread and data level parallelism in sequential applications and estimate parallel performance. We further demonstrate how SAPIENT determines the combination of application parallelism and polymorphic architecture configuration that maximizes performance. As an example, we present a detailed analysis of parallelism for an MPEG-2 decoder. We further summarize results for six other multimedia applications, identifying the presence of data and thread level parallelism, evaluating performance, and suggesting architecture configurations for each.
Keywords
microprocessor chips; multiprocessing systems; parallel architectures; parallel programming; video coding; MPEG-2 decoder; SAPIENT parallel analysis; application analysis framework; data level parallelism; multilevel parallel applications; multimedia application; polymorphic architecture configuration; polymorphic chip multiprocessors; Automatic control; Costs; Decoding; Distributed processing; Hardware; Parallel programming; Performance evaluation; Program processors; Programming profession; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
Print_ISBN
0-7695-2312-9
Type
conf
DOI
10.1109/IPDPS.2005.87
Filename
1419936
Link To Document